This is the home page for our 27^th major research exhibit at the IEEE/ACM Supercomputing conference... which is not really a thing this year. Yes, University of Kentucky / Aggregate.Org officially is participating, but it's all virtual and not very interactive.

Our 27^th Exhibit -- via Zoom

Well, the pandemic has pretty much made 2020 the year that wasn't. However, with lots of care, the University of Kentucky has managed to continue as a residential campus and everything sort-of still works. A majority of classes and meetings in general are now via Zoom, which has both good and bad aspects. We've also been trying to do our part to make things better; for example, we'll have a paper at Electronic Imaging 2021 on Mask Recognition in the Covered Safe Entry Scanner. The one supercomputing thing we're talking about this year is Parallel Bit Pattern Computing.

When he is available, Professor Henry (Hank) Dietz will have a Zoom link posted here for folks to come and chat.

We were live on Zoom Tuesday and Thursday, but the conference is over now. Thanks to all who visited our virtual exhibit... and we hope to see you in person next year at SC21.

Parallel Bit Pattern Computing

Parallel bit pattern computing is basically what the gate-level optimization of programs led us to. It combines aggressive runtime, gate-level, compiler optimization with a method for efficiently implementing quantum-like execution. The key idea behind all of that is to use various forms of symbolic execution to reduce power consumption, and execution time, by minimizing the number of gate-level operations required to perform a computation. For example, superposition and n-way entanglement are modeled by treating the value of a pbit as an ordered set of 2ⁿ bits, but the bit set is encoded as a generative regular expression and operations are performed directly on the regular expressions, without expanding them to a bit vector. The result is that we now are able to execute a wide range of quantum, and quantum-inspired, algorithms with fairly high efficiency. The slideshow from our 2019 exhibit gives a very quick overview, but there is also:

• Our paper, A Quantum-Inspired Model For Bit-Serial SIMD-Parallel Computation (PDF slides), was (virtually) presented at the Languages and Compilers for Parallel Computing workshop on October 15, 2020. It not only gives a few more details from a compiler point of view, but also includes examples. The last example is code for factoring 221.
• The CPE480 Computer Architecture class being taught Fall 2020 by professor Dietz is implementing the new Tangled processor in Verilog. Tangled is a simple 16-bit processor with Qat, a parallel bit pattern coprocessor.
• The one-page overview document we wrote for SC19, 2ⁿ Uses of a Live/Dead Cat, is available here as a PDF.
• Presented Parallel Bit Pattern Computing at The 10^th International Green And Sustainable Computing Conference. The slides from the conference presentation are here, and the full preprint paper is here.
• Presented A Gate-Level Approach To Compiling For Quantum Computers at The 9^th International Green And Sustainable Computing Conference. The full paper is available from the conference site and slides from our presentation are available here as a PDF.
• How Low Can You Go? (slides) was presented at Compilers and Languages for Parallel Computing (LCPC 2017).

Last year, we had a 3D printer, some 3D-printed qubits, and a working quantum-inspired computer in our exhibit:

This year, it's sitting powered-down in our machine room. However, we've posted a somewhat shakey video of the 16 "Q"-bit KREQC running an actual quantum program. It's a toy, but it's also a nice visual demonstration of some of the key concepts....

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