slide 18 of 19
Hardware configuration
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Faster processors, etc.
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Shared or separate L2 caches?
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Separate L2 caches minimize cache contention
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SPMD profits from shared L2 cache fetches
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More than one PCI bus?
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More I/O devices, more I/O parallelism
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But SMP Linux serializes OS I/O calls
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Memory interleaving?
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Improves DRAM cache block transfers
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Interleave unrelated to SMP parallelism