Overview of make:

make is a utility for organizing the files in a multi-file project. Its purpose is to help ensure that changes to a source file will be propagated to the parts of the project which depend on that file. make works by keeping track of which files a target depends on, so that if changes are made to any of these files, it will know that the target needs to be rebuilt.

To do this, make must have a listing of the files to be remade (the targets), the files upon which they depend (their dependencies), and the commands needed to build each target from its dependencies. This listing is called a makefile.

Before we get into the makefile itself, let's think about why we might have multiple files in our project...

Multiple source files, objects, and linking:

One common reason to use multiple source files is that writing code in multiple files allows functions to be split up into separate compiled object files which can be reused in other projects. This allows you to avoid rewriting similar code for each project, and to continually improve on the code you wrote earlier.

For example, you may decide to write one really useful set of math functions that you can use for the rest of your college career. Instead of rewriting the math code from scratch for each project or class, you can link in the object file containing the compiled versions of your math functions whenever you need one of these functions in a project.

Suppose you have written a file called math.c which contains the code for your math functions. You may want to compile this file to form an object called math.o, which could be included as part of a library or used on its own. This can be done with the following command:


	cc -c -o math.o math.c

The "-c" tells cc to compile the source file math.c into an object (and not to try to make it into an executable file). The "-o math.o" tells cc to call the object file math.o. Assuming there were no errors, this command will create an object file (for the machine that the compiler targets) that you can link with other objects to form executables use your math functions.

Suppose now that you want to write a program which uses some of these math functions, and that the main part of this program (the main function) resides in a file called mainfile.c. Within this file you call the function add_em_up() which is in your math object. You can compile mainfile.c into an object without having your math object available, but to make an executable (i.e. something that will run), you need to link the objects together. (Linking is the process of resolving the relative address of functions and variables across files.) This can be done in either one or two steps.

In the two-step version, the first step builds the mainfile object from mainfile.c, and the second links the mainfile and math objects to form the executable myprog:


	cc -c -o mainfile.o mainfile.c
	cc -o myprog mainfile.o math.o

To do this in one step you would use the command:


	cc -o myprog mainfile.c math.o

This compiles mainfile.c into an object and passes that object along with the object math.o to the linker. The "-o myprog" tells cc to have the objects linked to form an executable called myprog. The linker resolves references to things like add_em_up() and forms the executable file. When this is done, myprog is a program just like vi or ls which can be run by typing myprog at the prompt and hitting <Enter>.

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