The lecture slides as a PDF provide a good overview of everything with LOTS of Verilog code showing how everything is done in detail. I don't expect students to be able to write Verilog implementations like these from scratch, but I do expect that you can follow the logic, and at this stage I expect you can handle making minor modifications. The "complete" single-cycle design presented in the slides is http://aggregate.org/EE380/onebeq.html.
The textbook does have essentially the same single-cycle design covered, but the description is significantly different, and so are some control signals. In fact, the design isn't consistent in various versions of the text and associated materials, with things like the 0/1 connections for multiplexors varying. Don't let that bother you -- remember that the design isn't the important thing here, the process by which you design is. The tetxbook also doesn't talk about Verilog implementations....
We've mentioned this before, but by now you should be getting comfortable with reading, understanding, and making minor changes to Verilog designs. Remember that there are a variety of Verilog references linked here.
Computer Organization and Design.