The book does a nice job on this too... read it. Basically, it's all about a really dumb single-cycle implementation of MIPS:
A lot of this material should look very familiar. Remember that simple processor implementation we went through early in the course? We already talked about how to build all the basic chunks, which is why we didn't have to go through those aspects of the textbook now. The main reason we're doing this design is because, unlike the design we did after chapter 1, this dumb single-cycle version and its control logic turn into a very nice pipelined version....
Keep in mind this chapter also is where we discussed things like random logic vs. gate array implementations of control, which the text and homework also cover.
Computer Organization and Design.