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50%
50%
In the space below, write MIPS code for a leaf subroutine
mymul that will compute z=x*y;. Hint: use
addu because add detects overflow.M9 You
should test your routine using SPIM before you submit it.
Although there are many ways to do a multiply, here's C code for
one of them that you might want to use:
extern int x, y, z;
void
mymul(void)
{
/* do z = x * y the hard way... */
int t0 = 0;
int t1 = 1;
int t2 = x;
int t3 = y;
while (t1 != 0) {
if ((t1 & t3) != 0) {
t0 += t2;
}
t1 += t1;
t2 += t2;
}
z = t0;
}
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100%
For this question, check all that apply.
MIPS is not a CISC architecture, but a RISC with a simple
and highly regular instruction set.
Which of the following attributes correctly describe
the MIPS instruction set?
Look familiar? This was in assignment 3 too....
Arithmetic instructions allow 3 registers: two sources and one destination
To operate on a value from memory, you must load it into a register first
There are special instructions for managing stack frames
or $t1,$t0,$0 copies the value from $t0 into $t1
Instruction encoding is variable length
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50%
50%
Using only MIPS integer
instructions, write a function that will make x =
-y where x and y are floating-point
numbers. Your function only needs to handle normal float
values correctly, not NaN, etc.

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100%
In multiplying an integer, X, by 62 using the basic
shift-and-add algorithms discussed in class and in the book,
what is the minimum number of addition/subtraction operations
that must be performed? Show the values that are added or
subtracted: use (X<<Y) to represent the
value of X shifted by Y bit positions.
Hint: use Booth's algorithm.
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100% For this question, check
all that apply. In mathematics, both addition and
multiplication are associative; for example, a*(b*c)
gives the same value as (a*b)*c. Assuming no values go
out of range, are addition and multiplication associative for
32-bit 2's complement binary integers and for 32-bit
single-precision IEEE-format floating-point values? Mark
all the operations that are associative.
32-bit integer addition
32-bit integer multiplication
32-bit floating-point addition
32-bit floating-point multiplication
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100%
For this question, check all that apply.
In the single-cycle design shown in the above (rather large and
very familiar) figure, which of the following signals that
are "don't cares" when executing a MIPS sw instruction?
Branch
RegDst
ALUSrc
MemRead
MemtoReg
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100%
For this question, check all that apply.
In the single-cycle design shown in the above (rather large and
very familiar) figure, suppose that ALUSrc=1 and MemRead=0.
Which of the following MIPS instructions which might be executing?
sw $t0,4($t1)
lw $t0,4($t1)
ori $t0,$t1,2
beq $t0,$t1,l
add $t0,$t1,$t2
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100%
What is the logic formula for Y?