| Instructor: | Professor Hank Dietz |
|---|---|
| Office: | FPAT 469 |
| Email: | hankd@engr.uky.edu |
| Home URL: | http://aggregate.org/hankd/ |
| Course URL: | http://aggregate.org/EE380 |
| Course Meetings: | TuTh 12:30-1:45 in 257 FPAT |
| Course Text: | Any of the following three textbook editions is usable:
ISBN 978-0-12-370606-5, Computer Organization & Design, The Hardware/Software Interface, Third Edition Revised, Patterson & Hennessy, Morgan Kaufmann publisher, 3rd Edition Revised, 2007. ISBN 1-55860-604-1, Computer Organization & Design, The Hardware/Software Interface, Third Edition, Patterson & Hennessy, Morgan Kaufmann publisher, 3rd Edition, 2004. Computer Organization & Design (second edition), The Hardware/Software Interface, Patterson & Hennessy, Morgan Kaufmann publisher, 2nd Edition, 1997. |
EE380 is the undergraduate computer area core course and a key course for anyone interested in computer engineering. The course serves as an introduction to the design and analysis of modern computer architectures. It is expected that students entering this course will have some high-level language programming experience and basic understanding of digital logic (as per EE280).
A very approximate overview of the lecture coverage, in "lecture weeks," is given in the following table. Although both sections cover the same basic material, there are often minor warps in the lecture schedule and variations in coverage of additional material (in response to student questions, etc.). For this reason, you are expected to attend and participate in your assigned lecture section. Simple quizzes may be given in class to confirm your attentiveness. Further note that the reference chapters do not contain all the material covered in lectures; you are expected to understand any material discussed in lecture, cited from references, or presented via the course URL.
| Topic | 2nd Ed. Reference | 3rd Ed. Reference | Weeks |
|---|---|---|---|
| Introduction | Chapter 1 | Chapter 1 | 1.5 |
| A Simple Machine | Appendix B | Appendix B | 1.5 |
| Performance | Chapter 2 | Chapter 4 | 1 |
| Machine Language | Chapter 3; Appendix A | Chapter 2; Appendix A, D | 1.5 |
| Arithmetic | Chapter 4 | Chapter 3 | 2 |
| Data Path & Control | Chapter 5; Appendix C | Chapter 5; Appendix C | 1 |
| Pipelining | Chapter 6 | Chapter 6 | 1.5 |
| Memory Hierarchy | Chapter 7 | Chapter 7 | 1 |
| I/O & Parallel Processing | Chapters 8, 9 | Chapter 8, 9 | 1 |
The textbook for this course is excellent and we will follow it fairly closely. However, there is a severe discontinuity going from chapter 1 to chapter 2 in the 2nd edition, which the 3rd edition tries to reduce by re-arranging the chapters somewhat (and some 3rd edition material is on CDROM). The 3rd edition revised is not substantially different from the 3rd edition in this respect. We eliminate the problem by addition of a simple machine implementation after chapter 1, using notes and custom software created here. Most of the other material presented outside the scope of the text can be viewed as "modernization" of the ideas and examples. For example, we will discuss some of the new ideas used in the latest processor designs and you also will be introduced to the basic concepts of cluster computing. There is another edition of the text coming out shortly, and we might also use some material from it in our discussions.
Various homework/projects will be assigned. Generally, these must be submitted via the WWW forms at the course site; computer use will be discussed in lectures and at the course URL. Detailed grading may be done on only a subset of the work assigned. There also will be two 1-hour in-class exams and a 2-hour comprehensive final. The schedule for the two in-class exams will be announced in class and at the course URL; final exams are scheduled by the office of the registrar (the Fall 2008 EE380 final is 10:30AM Tuesday, December 16, 2008). Although we will try to accomodate requests to take in-class or final exams at other than the scheduled times, such requests generally will be considered only if made in writing or email at least a week before the scheduled exam time, and the course staff may decide to use a different format (e.g., an oral exam) for exams given at times other than those scheduled.
We reserve the right to adjust weightings, but the first two exams will count for about 20% of your grade each, the final will count for about 40%, and 20% of your grade will be based on the other assignments and quizzes. So that any grading errors can be consistently corrected for all students, regrade requests (preferably in writing) must be made promptly and must be specific as to the reason a regrade is requested. Any work submitted for regrade may be re-evaluated in its entirety.
Although students are encouraged to discuss course material with one another, everything you submit must be entirely your own original work. UK guidelines dictate that violation of this policy will result in all involved students failing the course; more severe penalties also may be applied. Contact Professor Dietz before submitting work if you have any doubts about how this policy might apply.
Computer Organization and Design.