This is the home page for our 31st major research exhibit at the IEEE/ACM Supercomputing conference. The exhibit is under the title University of Kentucky, reflecting the fact that it is now officially led by the Center for Computational Sciences and inclusive of many groups at the university. Of course, the informal research consortium Aggregate.Org, led by our KAOS (Compilers, Hardware Architectures, and Operating Systems) group here at the University of Kentucky's Department of Electrical and Computer Engineering, still has various materials in the booth. We are booth #4525, a 10x20 booth, not too far from the rightmost entrance to the hall and on the main aisle that goes across the hall.
The University of Kentucky exhibit is staffed by a number of people (as shown in the photo above), but this year, due to various scheduling conflicts, we will not have folks from our Aggregate.Org research group continuously staffing the booth. There are eleven folks staffing the exhibit this year, but only Professor Henry (Hank) Dietz is from our group. He was in the booth a fair amount, but left SC24 around 11AM Wednesday also taking the KES demo back with him. Appologies to any who were unable to meet with him or see the KES demo; this was just a very difficult situation to manage without the usual pile of students from our group staffing the exhibit. We expect to be back at SC25 with a number of students from our group.
As the character of SC continues to move away from the types of systems research that we do, we have decided to continue to simplify our exhibit materials. We're really talking about just one thing this year: Parallel Bit Pattern Computing. OK, we've actually been focused on this for more than a few years now... That said, here's our SC24 exhibit:
For the more observant readers, yes, KES has been somewhat reworked to make it nicer and more portable as a unit. The SC23 version had a number of mechanical compromises made in order to fit it in an airline carry-on bag, whereas I drove to Atlanta...
Parallel Bit Pattern computing (PBP) is a new model of computation that has the potential to reduce power per computation by orders of magnitude by minimizing the number of active gate operations required. The key idea is to use various forms of symbolic execution to reduce power consumption, and execution time, by minimizing the number of gate-level operations required to perform a computation. Aggressive compiler-like optimization is performed on bit-level representations of values at runtime. For example, instead of using something like a carry lookahead 32-bit adder to add one to a counter that goes from 0 to 100, PBP would implement the gate-level operations of a 7-bit incrementer. Thus, ideal PBP hardware looks a lot like some of the older massively-parallel SIMD supercomputers that used bit-serial processing elements. However, PBP is a quantum-inspired model, and it also gets an exponential reduction in both storage cost and number of gate operations required -- without using any quantum phenomena.
In PBP, superposition and E-way entanglement are modeled by treating the value of a pbit (pattern bit) as an ordered set of 2E bits. These ordered bit sets generally have very low entropy, so we take advantage of that to store and operate directly on a compressed representation. Not only does this allow efficient execution of quantum-like execution, but it also dramatically increases efficiency of SIMD code. Think of it this way: GPUs get speedup over traditional SIMDs in that if an entire warp of PEs is disabled, it can skip evaluation for that set of PEs. PBP not only shares that property, but also has the ability to skip recomputation for any warp of bit-level value computations that has been done before by any warp of PEs. Thus, PBP offers both quantum-like computing without quantum pehenomena and more efficient massively-parallel SIMD computation.
Our exhibit this year will feature a few simple demonstration PBP computation systems:
Although the PBP model is still in its earliest stages of development, there has been substantial progress...
There is now a C++ library implementing a fairly rich set of pint and pbit operations. Actually, there is even an improved version which also runs in an Arduino environment (e.g., on the ESP32 IoT systems described above), but it is not ready for release. All of this software and documentation should be considered to be "Alpha release" quality -- almost certain to contain bugs and subject to change in various ways -- but we are making it available so that others can develop an better understanding of how the new PBP model works.
The versions here are available under CC BY 4.0. Versions available:
A simple demonstration program is also available under CC BY 4.0. Versions available:
There is also a 3-panel, single sheet, reference card for the PBP C++ library. Versions available:
The current reference card is also available as PNG page images:
Are website updates ever done?