There will not be regular class meetings on Monday, November 13 nor Wednesday, November 15; however, it is strongly suggested that you use that time to meet and work in your grioups.
This is the official home page for EE480 (AKA, CS480), Advanced Computer Architecture. There is only one section, meeting MWF 3:00-3:50 in room 203 Ralph G Anderson
In many ways, the content of EE480 is very similar to that of EE380, but with one huge difference: what EE380 overviews, you will work with in-depth here, even specifying hardware implementation details to the gate level. You've no doubt heard that EE480 requires you to complete a relatively large-scale processor design project using Verilog -- yes, you will. In Fall 2016, we made a variety of significant changes to this course. Many of the changes aimed to improve the success rate of students in the class, while other were steps toward adjusting EE480 to better fit with the new curriculum structure that will be starting with the common first year for engineering. Upcoming changes affecting Computer Engineering include significant restructuring of the Sophomore year courses and making both EE380 and EE480 be required only for Computer Engineering majors... so EE380 is changing too, allowing the EE380+EE480 pair to be rebalanced to be more effective. In sum, expect EE480 in this Fall 2017 semester to be a bit of a bumpy ride as we continue to evolve this course, but know that it's because we're trying to make it a better course, and your input on how the changes work isn't just welcome -- it's critically important to us.
All course materials will be posted here... note that I said will be....
Professor Hank Dietz is usually in the Davis Marksbury Building; see his home page for
complete contact info. He has an "open-door" policy that
whenever his door is open and he's not busy with someone else,
he's available. Alternatively, you also can email email@example.com to make an appointment; please
use "EE480" in the email subject line for anything
related to this course.
Rajdeep Kumar Nath is the course TA. His office is on the second floor of Marksbury (email him to get into the area where his office is), and his email is rajdeepkumar.nath at gmail.com. He is available Mondays and Fridays 10AM-1PM, or other times by request. He maintains the gradebook, so you can email him to check grades. He also has a more traditional view of Verilog programming than Prof. Dietz (doesn't everybody?), so he's a good complementary reference in creating your projects.