This is the home page for our 29th major research exhibit at the IEEE/ACM Supercomputing conference. The exhibit is again under the slightly changed title University of Kentucky / Aggregate.Org, reflecting the fact that it is now officially led by the Center for Computational Sciences. Of course, the informal research consortium, led by our KAOS (Compilers, Hardware Architectures, and Operating Systems) group here at the University of Kentucky's Department of Electrical and Computer Engineering, still has about half of the materials in the booth. We are booth #3013, a 10x20 booth, between Hewlet Packard Enterprise and Google. Now that the conference is ended, here's a timelapse video of our exhibit:
As the character of SC continues to move away from the types of systems research that we do, we decided to keep things simpler. We're really talking about just one thing this year: Parallel Bit Pattern Computing.
Parallel Bit Pattern computing (PBP) is a new model of computation that has the potential to reduce power per computation by orders of magnitude by minimizing the number of active gate operations required. The key idea is to use various forms of symbolic execution to reduce power consumption, and execution time, by minimizing the number of gate-level operations required to perform a computation. Aggressive compiler-like optimization is performed on bit-level representations of values at runtime. For example, instead of using something like a carry lookahead 32-bit adder to add one to a counter that goes from 0 to 100, PBP would implement the gate-level operations of a 7-bit incrementer. Thus, ideal PBP hardware looks a lot like some of the older massively-parallel SIMD supercomputers that used bit-serial processing elements. However, PBP is a quantum-inspired model, and it also gets an exponential reduction in both storage cost and number of gate operations required -- without using any quantum phenomena.
In PBP, superposition and E-way entanglement are modeled by treating the value of a pbit (pattern bit) as an ordered set of 2E bits. These ordered bit sets generally have very low entropy, so we take advantage of that to store and operate directly on a compressed representation. Not only does this allow efficient execution of quantum-like execution, but it also dramatically increases efficiency of SIMD code. Think of it this way: GPUs get speedup over traditional SIMDs in that if an entire warp of PEs is disabled, it can skip evaluation for that set of PEs. PBP not only shares that property, but also has the ability to skip recomputation for any warp of bit-level value computations that has been done before by any warp of PEs. Thus, PBP offers both quantum-like computing without quantum pehenomena and more efficient massively-parallel SIMD computation.
Our exhibit this year will feature three PBP computation displays:
Although the PBP model is still in its earliest stages of development, there has been substantial progress...
There is now a C++ library implementing a fairly rich set of pint and pbit operations. Actually, there is even an improved version which also runs in an Arduino environment (e.g., on the ESP32 IoT systems described above), but it is not ready for release. All of this software and documentation should be considered to be "Alpha release" quality -- almost certain to contain bugs and subject to change in various ways -- but we are making it available so that others can develop an better understanding of how the new PBP model works.
The versions here are available under CC BY 4.0. Versions available:
A simple demonstration program is also available under CC BY 4.0. Versions available:
There is also a 3-panel, single sheet, reference card for the PBP C++ library. Versions available:
The current reference card is also available as PNG page images:
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The only thing set in stone is our name.